AMD Zen 6 Architecture: 12-Core CCX Hints at Future Ryzen Chips

The extra cache is less dramatic than it looks. Cores grow by the same proportion, so the nominal figure stays at 4 MB of L3 per core, as in Zen 5. L3 is shared across the package, so whether games, renderers or compilers benefit will depend on the workload. AMD also confirmed 3D V-Cache for the server line: Venice-X is planned with up to 1,152 MB of L3 per processor. That signals direction, not a spec for a future Ryzen X3D.

Zen 6c and the 27 percent figure

Zen 6c targets core density and whole-chip throughput. One package holds 32 cores and 128 MB of L3, versus 16 cores and 32 MB in Zen 5c, raising the nominal cache from 2 to 4 MB per core. Both variants share a 512-bit vector data path, and AMD claims a similar IPC gain for standard Zen 6.

AMD cites roughly 27 percent higher IPC for Zen 6c than Zen 5, a geometric mean across server and AI tasks: about 20 percent for enterprise and cloud workloads and about 31 percent for AI. The test used a fixed clock and 16 cores on each side, spread across two CCDs for Zen 5 and one for Zen 6c. The grouping of cores therefore differs, so the result reflects a new design under specific conditions rather than one isolated improvement.

That is why claims such as "Zen 6 gives Ryzen 27 percent more performance" or "27 percent more FPS" go too far. The numbers show the potential of the changes, but a data-center test suite does not represent a gaming library. Independent tests of actual products will show how much desktop users gain.